Method for the Fabrication of Dielectric Isolated Junction Field Effect Transistor and PNP Transistor.

摘要

The present invention relates broadly to semiconductor devices and integrated circuits, and in particular to the method and process for fabricating a dielectrically isolated junction field effect transistor and PNP transistor. The integrated circuit art has developed to the point where a plurality of transistors, diodes, field effect devices, capacitors, and resistors may be provided with a unitary body of semiconductive material. At this stage in the art integrated circuit fabrication is keyed to the fabrication of bipolar transistor structures, that is, the individual operations performed and tailored to provide a bipolar transistor structure of desired characteristics in the integrated circuit are preferably, and almost necessarily as an economic matter, used for the simultaneous fabrication of the other types of elements in the integrated circuit so as to minimize fabrication time, expense and the extent and number of times to which the structure is required to be heated and handled and to minimize the number of individual process steps that require close control so as to realize a satisfactory overall yield.