Impact of hard mask on reflectivity for litho-etch-litho-etch process in double patterning lithography

摘要

Double patterning lithography (DPL) is the leading candidate for fabricating devices of the 32 nm node and beyond. This research explores the effect of wafer stack topography originated from hard mask (HM) on reflectivity for litho-etch-litho-etch (LELE) process in DPL. Numerical study based on rigorous couple wave analysis (RCWA) algorithm is used to search the minimum bottom reflectivity of the resist with respect to the refractive index of HM, including the real and imaginary parts, and topography of HM. In addition, the impact of SiO2 film thickness on the reflectivity is presented either. Two split lithography imaging steps are introduced to the exposure of target critical dimension (CD) at 37 nm on wafer in the numerically emulated ArF immersion tool. The dependence of the stack reflectivity on the thickness of resist is addressed for wafer stacks with, and without considering the topography structure respectively. Finally, the swing curves indicate that the simulated wafer CDs, without considering the topography effect, is below 10% of the target CDs.