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A Novel Low Power 3 Transistor based Universal Gate for VLSI Applications

机译:一种适用于VLSI应用的新型基于低功耗3晶体管的通用门

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摘要

NAND and NOR gates are the two universal logic gates and any other logic gates can be built using them. This paper presents a novel three transistors (3T) based NAND gate with exact output logic levels, yet maintaining comparable performance than the other available NAND gate logic structures. The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs. The simulation tests were performed by employing standard 90nm CMOS process technology.
机译:NAND和NOR门是两个通用逻辑门,可以使用它们构建任何其他逻辑门。本文提出了一种新颖的基于三晶体管(3T)的NAND门,具有精确的输出逻辑电平,但仍保持与其他可用NAND门逻辑结构相当的性能。这种新逻辑的特点是具有极高的速度和低功耗,可以很容易地为超大规模集成电路(VLSI)设计制造。仿真测试是通过采用标准的90nm CMOS工艺技术进行的。

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