首页> 外文学位 >Formation of low-resistivity germanosilicide contacts to phosphorus doped silicon-germanium alloy source/drain junctions for nanoscale CMOS.
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Formation of low-resistivity germanosilicide contacts to phosphorus doped silicon-germanium alloy source/drain junctions for nanoscale CMOS.

机译:低电阻率的锗硅化物接触层形成了用于纳米级CMOS的磷掺杂的硅锗合金源/漏结。

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摘要

Conventional source/drain junction and contact formation processes can not meet the stringent requirements of future nanoscale complimentary metal oxide silicon (CMOS) technologies. The selective Si1−xGe x source/drain technology was proposed in this laboratory as an alternative to conventional junction and contact schemes. The technology is based on selective chemical vapor deposition of in-situ boron or phosphorus doped in Si 1−xGex source/drain areas. The fact that the dopant atoms occupy substitutional sites during growth make the high temperature activation anneals unnecessary virtually eliminating dopant diffusion to yield abrupt doping profiles. Furthermore, the smaller band gap of Si1−x Gex results in a smaller Schottky barrier height, which can translate into significant reductions in contact resistivity due to the exponential dependence of contact resistivity on barrier height. This study is focused on formation of self-aligned germanosilicide contacts to phosphorous-doped Si1−xGex alloys. The experimental results obtained in this study indicate that self-aligned nickel germanosilicide (NiSi 1−xGex) contacts can be formed on Si1−x Gex layers at temperatures as low as 350°C. Contacts Si1−xGex can yield a contact resistivity of 10 −8 ohm-cm2 with no sign of germanosilicide induced leakage. However, above a threshold temperature determined by the Ge concentration in the alloy, the NiSi1−xGex/Si1−x Gex interface begins to roughen, which affects the junction leakage. For phosphorus doped layers considered in this study, the threshold temperature was around 500°C, which is roughly 100°C higher than the threshold temperature for NiSi1−xGex contacts formed on boron doped Si1−xGex layers with a Ge percentage of ∼50%. Nickel and zirconium germanosilicides were also considered as contact candidates but they were found to result in a contact resistivity near 10−7 ohm-cm2.
机译:传统的源/漏结和接触形成工艺无法满足未来纳米级互补金属氧化物硅(CMOS)技术的严格要求。该实验室提出了选择性Si 1-x Ge x 源/漏技术,作为常规结和接触方案的替代方案。该技术基于在Si 1-x Ge x 源/漏区中掺杂的原位硼或磷的选择性化学气相沉积。掺杂剂原子在生长期间占据取代位点的事实使得高温活化退火几乎没有必要,从而消除了掺杂剂扩散以产生突变的掺杂分布。此外,Si 1-x Ge x 的较小带隙会导致较小的肖特基势垒高度,这可能转化为接触电阻率的显着降低,这是由于势垒高度上的接触电阻率。这项研究的重点是与磷掺杂的Si 1-x Ge x 合金形成自对准锗硅化物接触。本研究获得的实验结果表明,可以在Si 1-x 1-x Ge x )触点。 sub> Ge x 层在低至350°C的温度下。 Si 1-x Ge x 的接触电阻率为10 -8 ohm-cm 2 ,而没有锗硅化物引起泄漏的迹象。但是,在合金中Ge浓度决定的阈值温度以上时,NiSi 1-x Ge x / Si 1-x Ge < sub> x 界面开始变粗糙,从而影响结泄漏。对于本研究中考虑的磷掺杂层,阈值温度约为500°C,比NiSi 1-x Ge x 的阈值温度大约高100°C。在硼掺杂的Si 1-x Ge x 层上形成的接触点,其Ge含量约为50%。镍和锆锗硅化物也被认为是接触候选物,但发现它们导致的接触电阻率接近10 −7 ohm-cm 2

著录项

  • 作者

    Mo, Hongxiang.;

  • 作者单位

    North Carolina State University.;

  • 授予单位 North Carolina State University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 145 p.
  • 总页数 145
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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