Design of class-D audio power amplifiers in 130 nm SOI-BCD technology for automotive applications

摘要

In this work, design of class D audio power amplifier output stage implemented in 130 nm Silicon-on-Insulator (SOI) technology is proposed for high power efficiency and low distortion. The class-D audio amplifier consists of two DMOS power transistors in a totem-pole configuration, a gate driver, a shunt regulator, a ramp generator, a comparator and an integrator. The design method proposed in this study uses two on-chip shunt regulators to provide stable on-chip supply voltages to the gate driver circuits and a second-order feedback loop to suppress supply ripple. Its performance was found to be better than previously published output stages implemented in SOI based BCD processes, which are typically more complex and costly. The proposed class-D audio amplifier was designed, simulated and layed out in Cadence using TSMC 130 nm SOI-BCD technology. The class-D audio amplifier achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06%, and a power efficiency of 93%. The final design occupies approximately 1.5mm~2.