...
首页> 外文期刊>IEEE Electron Device Letters >1.6 nm oxide equivalent gate dielectrics using nitride/oxide (N/O) composites prepared by RPECVD/oxidation process
【24h】

1.6 nm oxide equivalent gate dielectrics using nitride/oxide (N/O) composites prepared by RPECVD/oxidation process

机译:使用RPECVD /氧化工艺制备的氮化物/氧化物(N / O)复合材料的1.6 nm氧化物当量栅极电介质

获取原文
获取原文并翻译 | 示例
           

摘要

Ultrathin nitride/oxide (/spl sim/1.5/0.7 nm) dual layer gate dielectrics have been formed using remote plasma enhanced CVD of nitride onto plasma-grown oxide interface layers. High accumulation capacitance (1.72 /spl mu/F/cm/sup 2/) is measured and the equivalent oxide thickness is 1.6 nm after quantum effect corrections. Compared to 1.6 nm oxides, a tunneling current reduction of more than 100 fold is found for devices with 1.6 nm N/O dielectrics due to increased film thickness and interface nitridation. Hole channel mobility decreases by about 5%, yielding very good P-MOSFET current drive. Excellent dielectric reliability and interface robustness are also demonstrated for P-MOSFET's with N/O dielectrics.
机译:使用氮化物的远程等离子增强CVD在等离子生长的氧化物界面层上形成了超薄氮化物/氧化物(/ spl sim / 1.5 / 0.7 nm)双层栅极电介质。在量子效应校正之后,测量到高累积电容(1.72 / spl mu / F / cm / sup 2 /),等效氧化物厚度为1.6 nm。与1.6 nm氧化物相比,由于膜厚增加和界面氮化,具有1.6 nm N / O电介质的器件的隧穿电流降低了100倍以上。空穴沟道迁移率降低了约5%,从而产生了非常好的P-MOSFET电流驱动。对于具有N / O电介质的P-MOSFET,还展示了出色的电介质可靠性和界面鲁棒性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号