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首页> 外文期刊>Electron Device Letters, IEEE >Gallium-Incorporated TiN Metal Gate With Band-Edge Work Function and Excellent Thermal Stability for PMOS Device Applications
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Gallium-Incorporated TiN Metal Gate With Band-Edge Work Function and Excellent Thermal Stability for PMOS Device Applications

机译:镓结合的TiN金属栅极具有边沿功函数和出色的热稳定性,适用于PMOS器件应用

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摘要

A cost-effective method for modulating the effective work function (EWF) of a metal gate while simultaneously decreasing the equivalent oxide thickness (EOT) of a high-$k$ dielectric is proposed for the first time. By incorporating gallium (Ga) into the TiN/HfLaON/interfacial layer (IL) $hbox{SiO}_{2}$ PMOS gate stack, a band-edge EWF of 5.18 eV and an EOT of 0.57 nm can be obtained. Excellent thermal stability was maintained even after the post metal anneal (PMA) at 1000 $^{circ}hbox{C}$. The impacts of TiN thickness, Ga implant doses, and PMA conditions on the properties of the Ga-incorporated TiN/HLaON/IL $hbox{SiO}_{2}$ gate stack are investigated, and the corresponding possible mechanisms are discussed. This technique has been successfully applied to the gate-first process flow to fabricate PMOSFETs with a minimum gate length of 28 nm.
机译:首次提出了一种经济有效的方法,用于调节金属栅极的有效功函数(EWF),同时降低高$ k $电介质的等效氧化物厚度(EOT)。通过将镓(Ga)掺入TiN / HfLaON /界面层(IL)$ hbox {SiO} _ {2} $ PMOS栅叠层中,可以获得5.18 eV的带边EWF和0.57 nm的EOT。即使在金属后退火(PMA)为1000 ^ hbox {C} $之后,仍保持了出色的热稳定性。研究了TiN厚度,Ga注入剂量和PMA条件对掺Ga的TiN / HLaON / IL $ hbox {SiO} _ {2} $栅堆叠的性能的影响,并讨论了相应的可能机理。该技术已成功应用于先栅极工艺流程,以制造最小栅极长度为28 nm的PMOSFET。

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