首页> 外文期刊>Applied Physics Letters >Improved integration of ultra-thin high-k dielectrics in few-layer MoS_2 FET by remote forming gas plasma pretreatment
【24h】

Improved integration of ultra-thin high-k dielectrics in few-layer MoS_2 FET by remote forming gas plasma pretreatment

机译:通过远程形成气体等离子体预处理改善超薄高k电介质在几层MoS_2 FET中的集成

获取原文
获取原文并翻译 | 示例
           

摘要

The effective and high-quality integration of high-k dielectrics on two-dimensional (2D) crystals is essential to the device structure engineering and performance improvement of field-effect transistor (FET) based on the 2D semiconductors. We report a 2D MoS_2 transistor with ultra-thin A1_2O_3 top-gate dielectric (6.1 nm) and extremely low leakage current. Remote forming gas plasma pretreatment was carried out prior to the atomic layer deposition, providing nucleation sites with the physically adsorbed ions on the MoS_2 surface. The top gate MoS_2 FET exhibited excellent electrical performance, including high on/off current ratio over 10~9, subthreshold swing of 85 mV/ decade and field-effect mobility of 45.03 cm_2/V s. Top gate leakage current less than 0.08 pA/μm~2 at 4 MV/cm has been obtained, which is the smallest compared with the reported top-gated MoS_2 transistors. Such an optimized integration of high-k dielectric in 2D semiconductor FET with enhanced performance is very attractive, and it paves the way towards the realization of more advanced 2D nanoelectronic devices and integrated circuits.
机译:二维(2D)晶体上高k电介质的有效和高质量集成对于器件结构工程和基于2D半导体的场效应晶体管(FET)的性能改进至关重要。我们报道了具有超薄A1_2O_3顶栅电介质(6.1 nm)和极低泄漏电流的2D MoS_2晶体管。在原子层沉积之前进行远程成型气体等离子体预处理,以在MoS_2表面上提供具有物理吸附离子的成核位置。顶栅MoS_2 FET表现出出色的电性能,包括在10〜9的高导通/截止电流比,亚阈值摆幅为85 mV /十倍和场效应迁移率为45.03 cm_2 / V s。在4 MV / cm的条件下,获得的顶部栅极泄漏电流小于0.08 pA /μm〜2,与报道的顶部栅极MoS_2晶体管相比,这是最小的。这种高k电介质在2D半导体FET中具有增强性能的优化集成非常有吸引力,它为实现更高级的2D纳米电子器件和集成电路铺平了道路。

著录项

  • 来源
    《Applied Physics Letters》 |2017年第5期|053110.1-053110.5|共5页
  • 作者单位

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

    State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, People's Republic of China;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号