Investigation of IT DRAM Cell with Non-Overlap Structure and Recessed Channel

摘要

In this paper, a capacitor-less IT DRAM cell transistor with non-overlap structure and recessed channel is presented. Because of the non-overlap structure between gate and source/drain, GIDL (Gate Induced Drain Leakage) current is efficiently suppressed at hold condition. This results in more than 1 s retention time at 25°C and 100 ms at 85°C