Layout-type dependence on ESD/LU immunities for LVTnSCR devices in LV applications

摘要

This paper aimed at the study of layout dependence on electrostatic discharge/latch-up (ESD/LU) immunities in the 0.35-μm 3.3-V low-voltage triggered silicon-controlled rectifier (LVTSCR) DUTs. In this work, the parameter of channel L in an nMOS and the parameter S of an SCR are varied to study the influence on trigger voltage (V_(tl)), holding voltage (V_h), and secondary breakdown current (I_(t2)). Eventually, it can be concluded that the layout illustration of type-2 has a higher I_(t2) than that of type-1, i.e., the ratio of (I_(t2))_(type-2)/(I_(t2))_(type-1) > 1.3 among all the LVTnSCRs. Meanwhile, the holding voltages of SCR devices are LU free while operated at 3.3 V. Therefore, the type-2 layout of SCR devices is an excellent structure in the ESD/LU reliability considerations for power management of communication applications.