Evaluation of Nanoscale-Controllable CVD-TaN Barrier for Mass Production on Dual Damascene Structure for Sub-100nm Via

摘要

In this article, the chemical vapor deposition (CVD) has been focused to overcome drawbacks of ALD process and investigate the effects of CVD-TaN on non-patterned wafer and dual damascene interconnect (DDI) for Cu metallization. First, the throughputs of CVD-TaN were calculated and compared to ALD-TaN. The CVD-TaN on non-patterned wafer was deposited as a function of deposition times, and then thin TaN films were controlled by CVD process. The CVD-TaN films, followed by PVD-Cu without vacuum break, were applied to SiOC (k=2.9) dielectrics in DDI which contains ~4000 chain-vias. The via resistances were measured at the variation of via sizes (100nm~l 50nm) and TaN thickness (10~45 A), and those are compared to the resistance of PVD-TaN, Finally, void formations in via and trench were observed after interconnect integrations.