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VHDL-AMS modeling method of digital integrated circuit based on IBIS

机译:基于IBIS的数字集成电路的VHDL-AMS建模方法

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This paper focuses on digital integrated circuit modeling method to characterize its function and transmission properties. The proposed method constructs the behavioral model of a digital integrated circuit, which is composed of the IO buffer section and functional section. The IO buffer section is described by IBIS, and the functional section is depicted by HDL. The two sections of the model are developed by using VHDL-AMS language. The model developed by this method is universal for any commercial digital device and has higher simulation speed than SPICE. At the end of this paper, the proposed method is verified through comparison with SPICE simulation.
机译:本文重点研究数字集成电路建模方法,以表征其功能和传输特性。该方法构造了由IO缓冲部分和功能部分组成的数字集成电路的行为模型。 IO缓冲区部分由IBIS描述,功能部分由HDL描述。该模型的两个部分是使用VHDL-AMS语言开发的。通过这种方法开发的模型对于任何商用数字设备都是通用的,并且仿真速度比SPICE高。最后,通过与SPICE仿真的比较,验证了该方法的有效性。

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