Effect of Gate Recess Variation on Electrical Characteristics and 2DEG Transport of InGaAs High Electron Mobility Transistors

摘要

In this paper, analysis of the gate recess variation on DC and RF characteristics on 0.25um psuedomorphic high electron mobility transistor using Sentaurus TCAD simulation have been carried out. Hydrodynamic transport model have been employed for the simulation. Furthermore, off state breakdown characteristics are also exploited, while exploring the essential features of 2-dimensional electron gas (2DEG) through self-consistent solution of Schrodinger and Poisson's equation. Results signifies wide gate recess structure are capable of having high cutoff frequency (F_T) and maximum frequency of oscillation (Fmax) up to 73.69 Ghz and 228.69 Ghz respectively but drain saturation current aggregates at the same time, simultaneously deteriorating electron density and mobility. Narrow gate recess devices have better current handling capabilities with superior DC output and transfer characteristics with prominent improvement in density of electrons but switching frequencies and breakdown voltage are detrimental, suppressing its safe operation at elevated temperature. Therefore an optimized gate recess length have been proposed while maintaining small gate to channel distance to minimize short channel effect; it allows a satisfactory tradeoff between current driving capability, frequency response and remarkable sheet carrier density besides having reasonable breakdown voltage. The proposed gate recess HEMT structure shows excellent qualifications as emerging candidate for high speed, low power logic applications.