首页> 外文会议>International Symposium on the Physical and Failure Analysis of Integrated Circuits >A novel approach to deprocess highly sensitive multi-layered IC device using polyimide protective films without damaging active circuitry
【24h】

A novel approach to deprocess highly sensitive multi-layered IC device using polyimide protective films without damaging active circuitry

机译:一种使用聚酰亚胺保护膜的辅助高敏感多层IC器件的新方法,而无损坏有源电路

获取原文

摘要

Recent advancement in chip design which made it possible to achieve more functionality in a smaller package means that the silicon die design needs to be compact and multi layered. One particular case which often caused difficulty to failure analysts was the Common Mode Filter (CMF) devices packed in the multi-leads, XDFN package. The device comes with an integrated ESD protection. Differential signaling I/O's can now have both common mode filtering and ESD protection in one package which makes the device a favorite in application for protecting systems using high-speed differential ports such as USB 3.0. Sometimes, due to assembly/wafer process mis-processing, the device will fail for high resistance between the internal/external connection pins. After exhaustive experimentations in which four techniques were evaluated to deprocess the devices in order to expose the silicon die, and wires, this paper aims to explore the best method to preserve the silicon die's active circuitry which consists of an intricate copper coil interconnects, and protective polyimide films which is very critical for a successful identification of the failure mechanism that will explain the reason why the devices failed in the first place. The chosed method in the end allowed the analyst to pin point the cause of high resistance failure which was contributed by micro-gap between the upper and lower layer of copper metal interconnects.
机译:最近进步在芯片设计,其使得能够在更小的封装单元,其硅管芯设计的需要是紧凑的和多层实现更多的功能。这通常会导致困难故障分析一特定的情况下是共模滤波器装在该多引线(CMF)设备,XDFN包。该器件具有集成的ESD保护。差分信号的I / O现在可以同时具有共模滤波和ESD保护在一个封装,这使得所述装置在应用程序中的喜爱的用于使用高速差分端口,诸如USB 3.0保护系统。有时,由于组件/晶片工艺误处理时,该装置将失败的内部/外部连接管脚之间的高电阻。穷举性实验,其中四个技术进行评估,以露出硅晶片到deprocess设备,和电线之后,本文旨在探讨以保留所述硅晶片的有源电路,该电路由一个复杂的铜线圈互连的最佳方法,和保护聚酰亚胺薄膜是失败的机制,这将解释为什么设备摆在首位失败的原因的鉴定成功非常关键。到底chosed方法允许分析者针点其贡献的铜金属互连件的上层和下层之间的微小间隙的高电阻故障的原因。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号