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Design and test of planar transformer using CMOS technology with BALUN applications

机译:使用CMOS技术和BALUN应用的平面变压器的设计和测试

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This paper presents design and test of a planar transformer using 0.18 µm CMOS technology with BALUN applications. To enhance the transformer coupling coefficient of the primary/secondary coil, the broadside-coupled structure is adapted while the circuit size is also minimized in chip area of 190 µm × 190 µm. The measured results based on the differential-/common-mode thru-reflect-line (TRL) calibration are shown and the associated transformer parameters including inductances and coupling coefficient are extracted. The additional BALUN application is performed as well in the frequency range of 1.6 GHz – 12 GHz.
机译:本文介绍了采用0.18 µm CMOS技术和BALUN应用的平面变压器的设计和测试。为了提高初级/次级线圈的变压器耦合系数,采用了宽边耦合结构,同时在190 µm×190 µm的芯片面积中使电路尺寸最小化。显示了基于差模/共模直通反射线(TRL)校准的测量结果,并提取了相关的变压器参数,包括电感和耦合系数。额外的BALUN应用程序也在1.6 GHz至12 GHz的频率范围内执行。

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