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Memory systems and methods of operating the same in which an active termination value for a memory device is determined at a low clock frequency and commands are applied to the memory device at a higher clock frequency

机译:存储系统及其操作方法,其中以低时钟频率确定存储设备的有效终止值,并以较高时钟频率向存储设备施加命令

摘要

A memory system includes a memory device that includes an active termination circuit. The memory system further includes a controller circuit that includes a frequency control circuit that is configured to modulate a system clock between a first frequency value and a second frequency value, greater than the first frequency value, responsive to a control signal. The controller circuit is further configured to determine an active termination value for the active termination circuit responsive to the system clock at the first frequency value, and to apply commands to the memory device responsive to the system clock at the second frequency value.
机译:存储系统包括具有有源终端电路的存储设备。该存储系统还包括控制器电路,该控制器电路包括频率控制电路,该频率控制电路被配置为响应于控制信号在第一频率值和大于第一频率值的第二频率值之间调制系统时钟。控制器电路还被配置为响应于第一频率值的系统时钟来确定有源终端电路的有源终端值,并且响应于第二频率值的系统时钟来向存储设备施加命令。

著录项

  • 公开/公告号US2003235107A1

    专利类型

  • 公开/公告日2003-12-25

    原文格式PDF

  • 申请/专利权人 JANG SEONG-JIN;

    申请/专利号US20030377374

  • 发明设计人 SEONG-JIN JANG;

    申请日2003-02-28

  • 分类号G11C8/00;

  • 国家 US

  • 入库时间 2022-08-21 23:15:45

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