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Integrated circuit test mode securisation
Integrated circuit test mode securisation
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机译:集成电路测试模式证券化
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摘要
The circuit has a logic circuit (2), and storage cells (3) connected to the circuit (2). A connection control module (4) connects the cells, according to a predetermined order, to form a test circuit, when the module`s input (41) receives a valid identification key and the cells receive a test reading or writing control signal. The module connects the cells to form a diversion circuit when the input does not receive the key. An independent claim is also included for a chip card including an electronic circuit.
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