首页> 外国专利> METHOD FOR FUNCTIONALLY CHECKING AN INTEGRATED CIRCUIT MODEL TO CONSTITUTE A VERIFICATION PLATFORM, EMULATOR EQUIPMENT AND VERIFICATION PLATFORM.

METHOD FOR FUNCTIONALLY CHECKING AN INTEGRATED CIRCUIT MODEL TO CONSTITUTE A VERIFICATION PLATFORM, EMULATOR EQUIPMENT AND VERIFICATION PLATFORM.

机译:功能性地检查集成电路模型以构成验证平台,仿真器设备和验证平台的方法。

摘要

In a first stage an autonomous emulator (1) is set up which replaces a low level language integrated circuit (IC) model by a high level language model able to perfect an environment emulator (51) from bus (30) data. The emulator (1) includes a calculator (10), memory (2) containing high level specification response data (20) and program memory (9). The second stage checks the IC program model against the emulator (1) : An independent claim is also included for : A verification platform which enables customers to check outputs against inputs on special purpose ICs using a functional specification.
机译:在第一阶段,建立自主仿真器(1),其用能够根据总线(30)的数据完善环境仿真器(51)的高级语言模型代替低级语言集成电路(IC)模型。仿真器(1)包括计算器(10),包含高级指定响应数据(20)的存储器(2)和程序存储器(9)。第二阶段根据仿真器(1)检查IC程序模型:还包括以下方面的独立声明:一个验证平台,该平台使客户能够使用功能规格对照专用IC的输入检查输出。

著录项

  • 公开/公告号FR2843214B1

    专利类型

  • 公开/公告日2008-07-04

    原文格式PDF

  • 申请/专利权人 BULL SA;

    申请/专利号FR20020009691

  • 发明设计人 KASZYNSKI ANNE;ABILY JACQUES;

    申请日2002-07-30

  • 分类号G06F17/50;G06F9/455;

  • 国家 FR

  • 入库时间 2022-08-21 19:47:22

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号