Pixel-Planes: Building a VLSI-Based Graphic System

摘要

Pixel-planes is a very large scale integration-based raster graphics machine that will support real-time interaction with three-dimensional shadowed, shaded, and colored images. The system's cost and complexity will be comparable to present-day line drawing systems, making it suitable for use with high-performance workstations. Potential applications include computer-aided design, medical display and imaging, molecular modeling, and simulators for flight and navigational training. Much of current research in experimental graphics systems is aimed at improving the speed of image generation by dividing the display into small regions, each of which is handled by separate concurrent processors. In Pixel-planes, this division is imbedded in a binary tree that performs the bulk of the system's computations and distributes the results to all pixels. Each pixel consists of an array of memory elements and a small processor that performs operations local to the pixel. The heart of the system is a Smart Frame Buffer consisting of an array of identical custom chips that contain the binary tree, pixel memories and processors, and video scan-refresh circuitry. These enhanced memory chips employ a moderately dense, conventional dynamic RAM that takes up about 2/3 of the chip's silicon area; the processing circuitry takes up the remaining 1/3. The fundamental operation of the Pixel-planes system is calculating linear expressions of the form Ax + By + C where x and y are the coordinates of a pixel and A, B, and C are data inputs to the system. These expressions are calculated bitserially in a binary tree multiplier/accumulator, simultaneously for all pixels. (Reprints)