Fuji Electric has developed superjunction MOSFETs with an optimized surface design that delivers lower switching loss. In these "Super J-MOS"chips, gate length and channel density were adjusted to optimize the gate-to-drain capacitance and threshold voltage, thus achieving lower turn-off loss. For devices rated at 600 V/20 A/0.19 Ω, an extremely low turn-off loss of 160 μJ at the turn-off dV/dt of 10 kV/us was realized. Power efficiency is over 94.0%, enabling compliance with the 80 PLUS certification.
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机译：富士电机开发了具有优化表面设计的超结MOSFET，可降低开关损耗。在这些“ Super J-MOS”芯片中，调整了栅极长度和沟道密度，以优化栅极至漏极的电容和阈值电压，从而实现了较低的关断损耗。对于额定值为600 V / 20 A / 0.19Ω的器件，在dV / dt的关断dV / dt为10 kV / us时，实现了160μJ的极低关断损耗。功率效率超过94.0％，符合80 PLUS认证。
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