The Implementation of Reversible Gates in Design of 1bit, 4-bit ALU and 8b/10b Encoder & Decoder

摘要

The implementation of conventional/irreversible logic gates can leads to the high power consumption and also the quantum computation with these logic gates is not possible. The reversible circuits can be used in the digital communication, signal processing, Cryptography as well as in computer graphics. The reversible circuits are the prime requisites for quantum computation where it consumes less gates during the synthesis process and also evolves no redundant input-output line pairs. This paper deals with the design of 1bit, 4bit arithmetic logic controller (ALU) and (8b/10b) encoder and decoder design by using conventional gates and reversible logic gates. The synthesis of the proposed designs were performed by using FPGA and is coded & simulated by using Xilinx 14.7 and modelsim6 respectively. From the performance analysis (by considering propagation delay, quantum cost, garbage outputs and total reversible gates used) it is been found that the proposed designs achieves significant results.