A Method of Reproducing Input/Output Error Trace on High-level Design for Hardware Debug Support

摘要

Post-silicon debugging of functional bugs is getting crucial due to the increasing complexity and the size of modern LSIs. Post-silicon debugging has been done by RTL simulation, but it has come to infeasible due to the limited simulation speed. In this paper, we propose a method to reproduce the input/output traces for behavior-level design from the original error input/output traces obtained in low levels including chip. The proposed method makes it possible to debug errors found in low-levels in high design abstraction-level, which improves the efficiency of debugging significantly with the high readability and reduced design size. We also demonstrate the experimental results obtained by applying our method to several design examples.