首页> 外文期刊>Journal of Low Power Electronics >An On-Chip Multi-Mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-Power Domain SoC Using a 65-nm Standard CMOS Logic Process
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An On-Chip Multi-Mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-Power Domain SoC Using a 65-nm Standard CMOS Logic Process

机译:片上多模式降压DC-DC转换器,用于使用65 nm标准CMOS逻辑工艺的多电源域SoC上的细粒度DVS

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摘要

In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts the I/O voltage to the required operating voltage of the voltage island. This regulator is equipped with programmable output buffer and switching signal modulator, according to the module operating condition. One particular feature is its fully asynchronous operation. The proposed converter has been designed and fabricated in a 65-nm standard CMOS logic process and occupies the area of 5 bonding pads. The maximum measured power efficiency is over 88%, and the measured leakage current in deep stand-by mode is only 19 nA.
机译:在本文中,我们提出了一种片上DC-DC降压转换器,用于多电源域SoC上的细粒度动态电压缩放(DVS)。所提出的电路将I / O电压转换为电压岛所需的工作电压。该调节器根据模块的工作条件配备了可编程输出缓冲器和开关信号调制器。一种特殊的功能是其完全异步的操作。拟议的转换器采用65纳米标准CMOS逻辑工艺进行设计和制造,占用5个焊盘的面积。测得的最大功率效率超过88%,在深度待机模式下测得的泄漏电流仅为19 nA。

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