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Reliability of HfSiON gate dielectrics

机译:HfSiON栅极电介质的可靠性

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The reliability of ultra-thin (1.38 nm-2.14 nm EOT) hafnium silicate gate dielectrics was studied to determine their suitability for incorporation into large-scale integration processes at sub-100 nm channel length. The reliability study includes a discussion of the evolution of current with time during a constant voltage stress, deduction of Weibull slopes, voltage acceleration and an estimate of the 10-year maximum operating voltage for devices fabricated with these layers. Finally, the change in Weibull slope at increased current step magnitude for constant voltage stress is used to observe the change in trap generation rate during a CVS until breakdown.
机译:研究了超薄(1.38 nm-2.14 nm EOT)硅酸f栅极电介质的可靠性,以确定它们是否适合在100 nm以下的沟道长度下集成到大规模集成工艺中。可靠性研究包括对在恒定电压应力下电流随时间的演变,Weibull斜率的推论,电压加速度以及用这些层制造的器件的10年最大工作电压的估计的讨论。最后,对于恒定电压应力,在电流阶跃幅度增大时,威布尔斜率的变化用于观察CVS直至击穿之前陷阱产生速率的变化。

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