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Instability of Dynamic- R_{text ON} and Threshold Voltage in GaN-on-GaN Vertical Field-Effect Transistors

机译:GaN-on-GaN垂直场效应晶体管中的动态R_ {text ON}和阈值电压的不稳定性

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摘要

This paper investigates the recoverable degradation of GaN-on-GaN vertical transistors under positive gate bias stress. Based on combined pulsed measurements and constant voltage stress test, we demonstrate the following original results: 1) when subjected to moderate gate stress (0 V < {V}_{text {GS}}< {3} V), the devices show a negative threshold voltage shift, which is correlated with a decrease in on-resistance. This process is ascribed to the detrapping of electrons from the Al2O3 insulator, induced by a low positive bias and 2) for high stress bias ( {V}_{text {GS}}ge {5} V), a strong positive shift in threshold voltage is observed. This effect, which shows a slow recovery, is ascribed to the injection of electrons from the accumulation region (channel) toward the dielectric. Temperature-dependent measurements and 2-D simulations were carried out to support the hypothesis on degradation, and to evaluate the contribution of surface and bulk current in the n-GaN drift layer.
机译:本文研究了正栅极偏置应力下GaN-on-GaN垂直晶体管的可恢复退化。基于组合的脉冲测量和恒压应力测试,我们证明了以下原始结果:1)当受到中等栅极应力(0 V <{V} _ {text {GS}} <{3} V)时,器件显示负阈值电压漂移,与导通电阻的降低相关。此过程归因于电子从Al2O3绝缘体中的释放,这是由低正偏压和2)引起的,即高应力偏压({V} _ {text {GS}} ge {5} V),即高正偏压观察到阈值电压。这种显示缓慢恢复的效应归因于电子从累积区域(沟道)向电介质的注入。进行了温度相关的测量和二维模拟,以支持有关退化的假设,并评估n-GaN漂移层中表面电流和体电流的贡献。

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