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FPGA Implementation of cache memory

机译:高速缓存的FPGA实现

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We describe cache memory design suitable for use in FPGA-based cache controller and processor. Cache systems are on-chip memory element used to store data. Cache serves as a buffer between a CPU and its main memory. Cache memory is used to synchronize the data transfer rate between CPU and main memory. As cache memory closer to the micro processor, it is faster than the RAM and main memory.The advantage of storing data on cache, as compared to RAM, is that it has faster retrieval times, but it has disadvantage of on-chip energy consumption. In term of detecting miss rate in cache memory and less power consumption, The efficient cache memory will proposed by this research work, by implementation of cache memory on FPGA. We believe that our implementation achieves low complexity and low energy consumption in terms of FPGA resource usage
机译:我们描述了适用于基于FPGA的缓存控制器和处理器的缓存存储器设计。高速缓存系统是用于存储数据的片上存储元件。缓存用作CPU及其主内存之间的缓冲区。高速缓存用于同步CPU和主内存之间的数据传输速率。由于高速缓存存储器离微处理器更近,因此它比RAM和主存储器要快。与RAM相比,将数据存储在高速缓存中的优点是它具有更快的检索时间,但具有片上能耗的缺点。在检测高速缓存存储器中的未命中率和降低功耗方面,本研究工作将通过在FPGA上实现高速缓存来提出高效的高速缓存存储器。我们相信我们的实现在FPGA资源使用方面实现了低复杂度和低能耗

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