We describe cache memory design suitable for use in FPGA-based cache controller and processor. Cache systems are on-chip memory element used to store data. Cache serves as a buffer between a CPU and its main memory. Cache memory is used to synchronize the data transfer rate between CPU and main memory. As cache memory closer to the micro processor, it is faster than the RAM and main memory.The advantage of storing data on cache, as compared to RAM, is that it has faster retrieval times, but it has disadvantage of on-chip energy consumption. In term of detecting miss rate in cache memory and less power consumption, The efficient cache memory will proposed by this research work, by implementation of cache memory on FPGA. We believe that our implementation achieves low complexity and low energy consumption in terms of FPGA resource usage
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