REVERSE DIODE LEAKAGE IN SPIKE-ANNEALED ULTRA-SHALLOW JUNCTIONS

摘要

We have investigated diode leakage in junctions produced by ion-implantation of B with energies of 0.5 - 2 keV and doses of 2x10~(14) ― 2x10~(15)cm~2 into n-type wells of ～1 x 10~(18) cm~(-3), after rapid-thermal anneals (RTA) in lamp-based and hot-wall furnaces. Junctions are as shallow as 30 nm and were directly probed to avoid complications arising from metalization. The leakage current, I_(lkg), was found to be independent of the implant dose at any reverse voltage (-1 and -5 V). This implies that the electrically active defects are sufficiently far removed and on the surface-side of the junction. In both systems, a spike anneal (no intentional dwell time at peak-temperature) resulted in higher I_(lkg) than a soak anneal (dwell time of several seconds at peak-temperature). However, for the same spike annealing recipe, the hot-wall RTA produces tighter distributions than the lamp-based RTA. The width of the distribution is a measure of the temperature uniformity across the wafer. Best leakage currents are of the order 1 x 10~(-6) A/cm~2, in good agreement with device simulations The shallowest junctions exhibit I_(lkg) ～5 x 10~(-4) A/cm~2, still well below the specification of even the low power transistor of a 100 nm technology.