High voltage (450 V) 6H-SiC substrate gate JFET (SG-JFET)

摘要

A high voltage 6H-SiC buried substrate gate JFET will be reported in this paper. The FET was fabricated using only three mask steps. Selective ion-implantation was used to create the conducting layer (N-channel), which allows easy isolation and edge termination. This FET was able to withstand a forward blocking voltage of 450 V at a pinch-off voltage of -400 V. This is the highest reported forward blocking voltage so far for any silicon carbide three terminal transistor. The specific on-resistance was found to vary between 25 and 75 mΩ-cm~2 for devices with different drain-source separation.