Carbon- and Tin- Incorporated Source/Drain Stressors for CMOS Transistors

摘要

We explore several technology options for forming latticemismatchedrnsource/drain (S/D) stressors for enhancing thernperformance of complementary metal-oxide-semiconductorrn(CMOS) field-effect transistors. Recent research on silicon-carbonrn(Si:C or Si1-yCy) S/D stressors for n-FETs will be reviewed.rnDevice integration work involving epitaxial Si:C S/D with highrncarbon concentration and in situ doping, as well as alternativerntechnologies for forming Si:C S/D, e.g. using implantation andrnanneal, will be discussed. For p-FETs, tin-incorporated S/Drnstressors will be explored. Integration of new stressors inrnadvanced device architectures is expected to enable the realizationrnof ultimate CMOS performance.