首页> 外文会议>Physics and technology of high-k gate dielectrics 7 >Nonvolatile Memory Capacitors Based on Double Gold nanocrystals and HfO_2 Tunneling and HfNO/HfTiO Laminate Control High-k Insulator Layers
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Nonvolatile Memory Capacitors Based on Double Gold nanocrystals and HfO_2 Tunneling and HfNO/HfTiO Laminate Control High-k Insulator Layers

机译:基于双金纳米晶体和HfO_2隧穿和HfNO / HfTiO层压控制高k绝缘层的非易失性存储电容器

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We describe all high-k, nonvolatile metal-insulator-semiconductor memory capacitor with an equivalent oxide thickness of 7.3 nm that makes use of two gold nanocrystal charge storage layers. The device exhibits a large memory hysteresis of about 0.75 V and 15 V, respectively at a sweeping gate voltages of ± 1V and +11V to -8V with a maximum storage charge density of ~2.75×10~(13) cm~(-2). The leakage current density is 3.6×10~(-5) A/cm~2 at -10 V and the breakdown voltage is in the range of 12.3V - 13.3V. A large memory hysteresis window of ~10 V was also observed after more than 10 hours of consecutive write / erase operations with a ± 7 V swing.
机译:我们描述了使用两个金纳米晶体电荷存储层的等效氧化物厚度为7.3 nm的所有高k非易失性金属-绝缘体-半导体存储电容器。该器件在±1V和+ 11V至-8V的扫栅电压下分别具有约0.75 V和15 V的大存储滞后,最大存储电荷密度为〜2.75×10〜(13)cm〜(-2) )。 -10 V时的漏电流密度为3.6×10〜(-5)A / cm〜2,击穿电压在12.3V至13.3V的范围内。在以±7 V的摆幅连续进行超过10小时的写入/擦除操作后,还观察到了约10 V的大存储器滞后窗口。

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