More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. A mixed signal/mixed power SoC design, using Synopsys Libraries, based on Chartered 0.35μm Salicide 2P4M CMOS mixed signal process is introduced in this paper. The method of supply the core with different powers, isolated the digital part and the analog part and splitting the padring is also proposed. The physical layout design and its verification are implemented using Astro and Calibre.
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