Identifying Root Cause of Systemic Yield Loss Using Model-based Yield Analysis - (PPT)

摘要

In modern semiconductor fabs, final yield can be affected by many factors. From bare wafer to final packaging, hundreds of process steps are involved and each and every process or tool may impact the final yield. Statistical process control (SPC) has been used extensively for monitoring process health and identifying out-of-control parameters. Due to the multiple-vitiate nature of modern processes, however, process deviations have different impact on the final yield. Even processes that are within traditional SPC control limit may suffer yield loses that are caused by the interaction between different process aspects. In such cases, traditional yield analysis techniques such as SPC are not sufficient. We introduce in this paper a model-based technique that offers more accurate root cause analysis.