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Characterizing Jitter Performance of Multi GigabitFPGA-Embedded Serial Transceivers

机译:特征在于多GigabitFPGA嵌入式串行收发器的抖动性能

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High-speed serial links are a key component of dataacquisition systems for High Energy Physics. They carry physicsevents data and often also clock, trigger and fast control signals.For the latter applications, the jitter on the clock recovered fromthe serial stream is a critical parameter since it directly affectsthe timing performance of data acquisition and trigger systems.Latest Field Programmable Gate Arrays (FPGAs) include multi-gigabit serial transceivers, which are configurable with variousoptions and support many data encodings. However, an in-depthjitter characterization of those devices is not available yet. In this paper we present measurements of the jitter on theclock recovered by a GTP transceiver (embedded in a XilinxVirtex 5 FPGA) as a function of the data pattern, coding andlogic activity on the transmitter and receiver FPGAs.
机译:高速串行链路是高能量物理学的Dataacquisition系统的关键组成部分。它们携带物理性数据,并且通常也是时钟,触发和快速控制信号。从串行流恢复的时钟上的抖动是一个关键参数,因为它直接影响数据采集和触发系统的时序性能。最新的现场可编程门数组(FPGA)包括多千兆位串行收发器,可与各种选择配置,并支持许多数据编码。但是,这些设备的深入吉特表征尚未使用。在本文中,我们将通过GTP收发器(XilinxVirtex 5 FPGA中的Theclock恢复的抖动的测量结果为数据模式,编码发射器和接收器FPGA的编码和接收器FPGA的函数。

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