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Structure Control of Ferroelectric PbTiO{sub}3 Thin Films using SrTiO{sub}3 Buffer Layer Prepared by Metalorganic Decomposition

机译:使用SRTIO {Sub} 3薄膜的铁电PBTIO {Sub} 3缓冲层的结构控制

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Polycrystalline PbTiO{sub}3 thin films were successfully formed on SrTiO{sub}3 buffer layer by metalorganic decomposition (MOD) technique. The PbTiO{sub}3 films showed the perovskite structure after annealing at 700°C for 30 min in N{sub}2 ambient. A higher dielectric constant of 157 is obtained in the PbTiO{sub}3/SrTiO{sub}3/Si structure. The hysteresis loop in the capacitance-voltage curves of the MFIS configration indicated a memory window of 1.2 V with a programming voltage swing of ±5 V due to polarization effect. The memory window will satisfy the practical application of the MFIS-FET memories operating at low voltage in future ULSIs.
机译:通过金属有机分解(MOD)技术在SRTIO {Sub} 3缓冲层上成功形成了多晶PBTIO {Sub} 3薄膜。 PBTIO {Sub} 3膜在N {Sub} 2环境中在700℃下退火30分钟后,钙钛矿结构显示。在PBTIO {Sub} 3 / SRTIO {Sub} 3 / Si结构中获得较高介电常数为157。 MFIS配置的电容电压曲线中的滞后回路指示了1.2 V的存储器窗口,其由于偏振效应而具有±5 V的编程电压摆动。内存窗口将满足MFIS-FET存储器在未来ULSIS中以低电压运行的实际应用。

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