A Wide-Swing V{sub}T-Referenced Circuit with Insensitivity to Device Mismatch

摘要

This study presents a wide-swing V{sub}T-referenced circuit which is insensitive to device mismatch in CMOS technology. The wide-swing cascade design is used to increase the output resistance, maximize the voltage-signal swings, and improve the current matching. The error current is greatly reduced by providing an additional mirrored current in the V{sub}T-referenced circuit. A start-up circuitry is also included, which affects only the circuit in the case that all currents in the loop are zero. All the bipolar-junction transistors are laid out using the p-substrate PNP structure. Analytic results indicate that the proposed circuit is insensitive to device mismatch, and provides a stable bias current accurately.