Due to the aggressive scaling of semiconductor devices, present semiconductor devices contain various kinds of nano-scale interfaces and nano-structures. In this paper, we show two examples in which physics can really give guiding principles for future semiconductor technologies. First, we discuss physics for future Si nanowire FET. When one-dimensional ballistic conduction is achieved, the hole conductivity of a Si nanowire FET is basically determined by the number of hole quantum channels near the valence band maximum (VBM). However, as the density of bands increase, the spacing of each band becomes narrower, which will allow inter sub-band scattering and eventually reduces the conductivity. In the light of the above discussions, it may be concluded that there exists a trade-off between the quantum channel numbers and inter sub-band scattering and an optimum size exists for Si nanowire FET applications. Moreover, we also discuss our new interface physics which is crucial for controlling threshold voltages in high-k gate stacks.
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