VPUF: Voter based Physical Unclonable Function with High Reliability and Modeling Attack Resistance

摘要

Physical Unclonable Function (PUF) has broad application prospects in the field of hardware security. Arbiter PUF is a typical PUF, but is threatened by modeling attacks. To resist attack, XOR arbiter PUF employs multiple basic arbiter PUFs and XOR their response bits to generate the final response bit. However, its low reliability not only limits its applications, but also leaks information to enhance modeling attacks. To improve both the reliability and the modeling attack resistance, we propose the Voter based PUF (VPUF), which also employs multiple basic arbiter PUFs. It has two key components: (1) an on-line reliability checker to evaluate the reliability level of each internal response bit produced by each basic arbiter PUF; (2) a weighted voter, instead of XOR gates, to produce the final response bit. Experiments in FPGAs show 7.6%～23.4% reliability improvement of the VPUF than the XOR arbiter PUF, and prove the VPUF can resist modeling attacks.