首页> 外文会议>IEEE International Symposium on On-Line Testing and Robust System Design >Field Profiling Monitoring of Payload Transistors in FPGAs
【24h】

Field Profiling Monitoring of Payload Transistors in FPGAs

机译:FPGA中有效载荷晶体管的现场分析和监控

获取原文

摘要

A new use for ring-oscillators (ROs) is proposed by which PMOS and NMOS transistor strengths can be measured and monitored in the field. A new metric, based on RO duty-cycle is defined. This new metric, along with RO-frequency, offers a way to profile and bin transistors based on their drive strengths. With ROs configured from payload transistors, along with the natural programmability of FPGAs, this strength based profiling can be done in the field at a level of granularity that is not possible with existing methodologies. New applications of the metrics and the profiling methodology include use of on-die ROs as a (a) monitor and control for duty-cycle sensitive designs, (b) replacement for scribe-line test structures, and (c) sensor for payload transistor characteristics over life-time.
机译:提出了一种新用途,通过该振荡器(ROS)可以在该领域中测量和监测PMOS和NMOS晶体管强度。定义了一种基于RO占空比的新度量。这种新的公制以及RO频率提供了一种基于其驱动强度的轮廓和箱晶体管的方法。通过从有效载荷晶体管配置的ROS,随着FPGA的自然可编程性,可以​​在现有方法中以不可能的粒度级别在该领域完成这种强度的分析。度量和分析方法的新应用包括使用On-Die ROS作为(a)监测和控制用于占空比敏感设计,(b)替代划线测试结构,(c)有效载荷晶体管的传感器生命时间的特点。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号