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Integrated circuit including a low-noise amplifying circuit with asymmetrical source and drain regions and a logic circuit with symmetrical source and drain regions

机译:集成电路,包括具有不对称源和漏区的低噪声放大电路和具有对称源和漏区的逻辑电路

摘要

An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.
机译:集成电路包括逻辑电路和放大电路,特别是低噪声放大电路。放大电路包括至少一个第一晶体管。第一晶体管的栅极耦合到信号输入端子,第一晶体管的源区和漏极区域分别在栅极的两侧的第一晶体管的阱区中形成,其中源区耦合到源区的参考电压端子和焊块电阻低于漏区。逻辑电路包括至少一个第二晶体管。源区和第二晶体管的漏极区域的薄层电阻是相等的。

著录项

  • 公开/公告号US11069806B2

    专利类型

  • 公开/公告日2021-07-20

    原文格式PDF

  • 申请/专利权人 RICHWAVE TECHNOLOGY CORP.;

    申请/专利号US202016823337

  • 申请日2020-03-19

  • 分类号H01L29/78;H01L29/08;H01L27/06;H01L29/10;H01L21/8234;H01L27/088;H03F3/213;

  • 国家 US

  • 入库时间 2022-08-24 20:00:55

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