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STATISTICAL LOGIC TEST SYSTEM HAVING A WEIGHTED RANDOM TEST PATTERN GENERATOR
STATISTICAL LOGIC TEST SYSTEM HAVING A WEIGHTED RANDOM TEST PATTERN GENERATOR
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机译:具有加权随机测试模式生成器的统计逻辑测试系统
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摘要
A system for testing complex circuitry primarily in large scale integration where a great number of inputs and outputs must be tested and the internal circuitry is inaccessible. The test system has a weighted random number generator which applies a test signal to some input terminals of the logic under test more frequently than others. A particular input terminal to the logic under test can be accessed in proportion to the circuit switching activity associated with accessing that particular terminal.
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