NONINVERTING BI-CMOS GATES WITH PROPAGATION DELAYS OF A SINGLE BI-CMOS INVERTER

摘要

The present invention relates to a non-inverting bi-MOS logic gate whose propagation delay, such as a buffer or an AND gate, is approximately equal to the propagation delay through an inverter. One or more pass gates Q20-QA23 are used in the control path leading to the bipolar output transistor Q24, and one control gate of the MOS transistors constituting the pass gate is connected to the signal input terminal 20 of the bi-MOS gate. The control gate of the other MOS transistor is connected to the complement of the signal input terminal, the output terminal of the pass gate is connected to the base of the bipolar output transistor Q24, and the pass gate connected to the signal input terminal 20 is one. One or more pass gates may be used, and one or more pass gates connected to the signal input terminal 20 may be used. If a byte is used is characterized in that the output of the pass gate is configured with a connection (N21).