首页> 外国专利> METHOD OF CONTROLLING OXIDE THINNING IN AN EPROM OR FLASH MEMORY ARRAY IN EPROM OR FLASH MEMORY ARRAY

METHOD OF CONTROLLING OXIDE THINNING IN AN EPROM OR FLASH MEMORY ARRAY IN EPROM OR FLASH MEMORY ARRAY

机译:控制EPROM或Flash存储器阵列中的EPROM或Flash存储器阵列中的氧化物变薄的方法

摘要

There is provided a method of fabricating an electrically programmable read only memory (EPROM) or flash memory array structure to control oxide thinning to prevent shorting and trenching of bit lines in the array. The present invention includes the following steps. First, a layer of gate oxide, poly 1, ONO, poly cap and nitride is sequentially deposited on a substrate according to conventional processing techniques. Subsequently, a thin poly layer is deposited on the nitride layer in accordance with the present invention. The thin film poly / nitride / poly cap / ONO / poly layer is then etched to establish parallel strips of thin film poly / nitride / poly cap / ONO / poly 1. Next, a spacer oxide layer is formed on the end layer. Subsequently, the thin film poly layer and the substrate are subjected to a uniform subsequent etching of the spacer oxide and the end oxide layer until exposed. Subsequently, an N-type dopant is introduced into the germanium material between the thin film poly / nitride / poly cap / ONO / poly 1 strip to establish the N + buried bit line of the array. Optionally, a thin layer of the end oxide may be formed on the substrate prior to introducing the dopant. A buried bit line is formed and then a differential oxide layer is deposited over the structure and the process is continued according to conventional steps.
机译:提供了一种制造电可编程只读存储器(EPROM)或闪存阵列结构以控制氧化物减薄以防止阵列中位线的短路和开槽的方法。本发明包括以下步骤。首先,根据常规处理技术,在衬底上顺序沉积一层栅极氧化物,多晶硅1,ONO,多晶硅帽和氮化物。随后,根据本发明,在氮化物层上沉积薄的多晶硅层。然后蚀刻薄膜多晶硅/氮化物/多晶硅盖/ ONO /多晶硅层以建立平行的薄膜多晶硅/氮化物/多晶硅盖/ ONO /多晶硅1的条。接下来,在端层上形成间隔氧化层。随后,对薄膜多晶硅层和基板进行均匀的后续蚀刻,直到间隔层氧化物和端部氧化物层被暴露为止。随后,在薄膜多晶硅/氮化物/多晶硅帽/ ONO /多晶硅1条之间的锗材料中引入N型掺杂剂,以建立阵列的N +掩埋位线。任选地,可以在引入掺杂剂之前在基板上形成末端氧化物的薄层。形成掩埋位线,然后在该结构上沉积微分氧化物层,并根据常规步骤继续该过程。

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