High speed comparator having two differential amplifier stages and latch stage

摘要

In a comparator including a first differential amplifier stage for amplifying the difference in potential between input signals, a second differential amplifier stage for amplifying the difference in potential between output signals of the first differential amplifier stage, and a latch stage for positively feeding output signals of the second amplifier stage back thereto, a first differential switch circuit alternately activates the second differential amplifier stage and the latch stage, and a second differential switch circuit alternately activates the first differential amplifier stage and the latch stage.