Manufacturing method of large scale integrated circuit device and large scale integrated circuit device

摘要

An object of the present invention is to provide a method for modeling macros and extracting characteristics to facilitate calculation of delay time. The present invention provides a logic library in which a delay characteristic data of the boundary cell is given as attribute data to the input terminal and the output terminal for a macro in which boundary cells are added in the vicinity of an input terminal and an output terminal having a macro core having a predetermined function. Generating data and storing it in a file; and designing a logic circuit having at least a plurality of cells and the macro, wherein the cell is connected to the macro core via a boundary cell connected to the input and output terminals of the macro; And a step of calculating a delay time of a macro on the designed logic circuit based on the delay characteristic data, and performing a logic simulation of the designed logic circuit according to the calculated delay time. The above problem is solved by providing a method for manufacturing a circuit device. The delay characteristic data is data for a delay time characteristic that depends on the input slew rate.