首页> 外国专利> A Galois field polynomial multiply / divide circuit and a digital signal processor incorporating it (A GALOIS FIELD POLYNOMIAL MULTIPLY / DIVIDE CIRCUIT AND A DIGITAL SIGNAL PROCESSOR INCORPORATING SAME)

A Galois field polynomial multiply / divide circuit and a digital signal processor incorporating it (A GALOIS FIELD POLYNOMIAL MULTIPLY / DIVIDE CIRCUIT AND A DIGITAL SIGNAL PROCESSOR INCORPORATING SAME)

机译:Galois场多项式乘法/除法电路和集成了该电路的数字信号处理器(GALOIS场多项式乘法/除法电路和数字信号处理器组成相同)

摘要

The multiplication / division circuit 20 uses the exclusive-OR function 32 of the ALU 30. The result of the exclusive OR function 32 through the shift registers 26,34 and the accumulators 46,60,22 that recycle the shifted signal back to the ALU 30 can be made to execute a multiplication or division function . When used for communication purposes, the multiply / divide circuit 20 can perform line encoding and cyclic redundancy checking among other functions.
机译:乘法/除法电路20使用ALU 30的异或功能32。异或功能32的结果通过移位寄存器26,34和累加器46,60,22将移位后的信号循环回ALU。可以使30执行乘法或除法功能。当用于通信目的时,乘法/除法电路20可以执行线编码和循环冗余校验等功能。

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