Method and apparatus for providing redundant memory in an integrated circuit utilizing a subarray shuffle replacement scheme

摘要

A method and an apparatus for providing an integrated circuit memory with redundancy. In one embodiment, an integrated circuit memory is organized into subarrays of rows and columns of memory cells. Each of the subarrays are sequentially grouped such that each subarray is adjacent to at least one other subarray. Included in the sequentially organized subarrays is a redundant subarray. Each subarray, including the redundant subarray, is configured to store data designated to be stored in a neighboring adjacent subarray. Therefore, if a defective memory cell is detected in any of the subarrays, the adjacent neighboring subarrays are configured to store the data designated for a neighboring subarray. As a result, the storage of data in the memory is shuffled towards the redundant subarray to implement redundancy. With the subarray organization of memory in the present invention as well as the shuffling of data into the redundant subarray, fewer non-volatile storage elements are required by the present invention which saves valuable chip area. Furthermore, with the shuffling described herein, long additional wires are not required to incorporate redundancy which increases the overall memory performance of the present invention.