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Micro architecture for a microprocessor or microcontroller arithmetic logic unit has an optimized architecture in comparison with existing architectures
Micro architecture for a microprocessor or microcontroller arithmetic logic unit has an optimized architecture in comparison with existing architectures
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机译:与现有架构相比,用于微处理器或微控制器算术逻辑单元的微架构具有优化的架构
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摘要
Micro architecture of an arithmetic logic unit for replacing in an equivalent manner a micro architecture comprising two N bit adders in cascade to provide a result in N bits in an accumulator. Replacement micro architecture comprises a backup adder (11) followed by an adder (4), the adders and accumulator being extended to N+1 bits in a circuit for determination of the remainder (C39) associated with a result supplied by the first architecture.
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