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SEMICONDUCTOR INTEGRATED CIRCUIT TESTER, TESTING BOARD AND SEMICONDUCTOR INTEGRATED CIRCUIT TESTING METHOD

机译:半导体集成电路测试仪,测试板和半导体集成电路测试方法

摘要

PROBLEM TO BE SOLVED: To realize a high-speed test of semiconductor devices. ;SOLUTION: This is a semiconductor integrated circuit tester for testing the operation of each semiconductor device, by dividing a large number of semiconductor devices into a plurality of test groups, and successively supplying a testing signal to the semiconductor devices in each test group. The tester is provided with testing boards 1, which have a large number of mounted IC sockets a11 to amn for fitting semiconductor devices, and clock selection supply means S for performing a changeover of clock signals, supplied from outside in synchronization with a group selection signal for specifying a test group and supplying it to each of the IC sockets a11 to amn.;COPYRIGHT: (C)2003,JPO
机译:要解决的问题:实现半导体器件的高速测试。 ;解决方案:这是一种半导体集成电路测试仪,用于通过将大量半导体器件划分为多个测试组并依次向每个测试组中的半导体器件提供测试信号来测试每个半导体器件的操作。该测试仪具有测试板1,该测试板1具有用于安装半导体器件的大量安装的IC插座a11至am,以及用于与外部时钟同步地与组选择信号一起提供的用于执行时钟信号的转换的时钟选择供给装置S。用于指定测试组并将其提供给每个IC插槽a11至amn 。;版权所有:(C)2003,JPO

著录项

  • 公开/公告号JP2003057292A

    专利类型

  • 公开/公告日2003-02-26

    原文格式PDF

  • 申请/专利权人 ANDO ELECTRIC CO LTD;

    申请/专利号JP20010247832

  • 发明设计人 KAWAI ATSUSHI;

    申请日2001-08-17

  • 分类号G01R31/26;G01R31/28;G01R31/30;

  • 国家 JP

  • 入库时间 2022-08-22 00:14:17

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