首页> 外国专利> Method of fabrication of an Integrated circuit used mainly for radio-frequency applications, has bipolar transistors especially of the hetero-junction type, and insulated gate field effect transistors

Method of fabrication of an Integrated circuit used mainly for radio-frequency applications, has bipolar transistors especially of the hetero-junction type, and insulated gate field effect transistors

机译:主要用于射频应用的集成电路的制造方法具有特别是异质结型的双极晶体管和绝缘栅场效应晶体管

摘要

When the fabrication of the insulated gate field effect transistor is started, then the bipolar transistor (BIP1,BIP2) is totally fabricated, before the resumption of fabrication of the insulated gate field effect transistor (MOS), and the step of common finishing of the two transistors is executed, including the common thermal reheating treatment (122) and common silication treatment.
机译:当开始制造绝缘栅场效应晶体管时,在恢复制造绝缘栅场效应晶体管(MOS)之前,必须先完成双极晶体管(BIP1,BIP2)的整体制造,并完成共同的步骤。执行两个晶体管,包括常规的热再热处理(122)和常规的硅化处理。

著录项

  • 公开/公告号FR2835652A1

    专利类型

  • 公开/公告日2003-08-08

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS SA;

    申请/专利号FR20020001305

  • 发明设计人 MARTY MICHEL;CHANTRE ALAIN;

    申请日2002-02-04

  • 分类号H01L21/8249;

  • 国家 FR

  • 入库时间 2022-08-21 23:37:42

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