Frequency multiplying circuitry with a duty ratio varying little

摘要

Frequency multiplying circuitry includes a couple of integrator circuits. The one integrator circuit charges a capacitor with a larger time constant via a resistor when an input clock signal is in its high level and then discharges it with a smaller time constant when the clock signal is in its low level. The other integrator circuit charges and discharges its capacitor in the opposite manner to the one integrator circuit as to the level of the clock signal. An output circuit compares the output voltages of both integrator circuits with a reference voltage and raises the level of its output signal when either one of the output voltages drops below the reference voltage. The duty ratio of the circuitry is therefore little susceptible to the frequency of the input signal and power supply voltage.